Small description about Layer Stackup of PCB

Designing a proper stack-up is critical to achieve the lowest cost and highest reliability PCB design. This is getting increasingly more difficult as high speed digital design is getting more complex. A stack-up refers to the arrangement of the copper and insulating layers that make up a Printed Circuit Board (PCB). The stack-up must consider several job functions to ensure success. A collaborative effort between the layout, signal integrity, hardware engineer and manufacturing (fabrication/assembly) vendor is key to ensuring that all parameters are met and incorporated into the stack-up. It is critical that the stack-up is generated and agreed upon by all parties early in the design phase. This ensures that each discipline knows what the final layout will entail and prevents any issues during the critical layout phase of a design. It is strongly recommended to follow the associated Platform Design Guide (PDG) whenever possible. A collaborative effort between the layout, signal integrity, hardware engineer and manufacturing (fabrication/assembly) vendor is key to ensuring that all parameters are met and incorporated into the stackup. 

There are numerous items to consider in determining the best stack-up for a specific design. These items include the following:

 • PCB Material- 

 Use standard fiberglass epoxy-resin or flame retardant 4 (FR4) material when possible. Alternate materials may be needed depending on the design; however, there may be a significant cost adder when selecting certain materials.

Restriction of Hazardous Substances (RoHS) and halogen-free compliance.

Material availability from vendor to vendor may vary limiting selection. This should be evaluated for the life of the design to prevent any future stack-up changes.

 • PCB Layout

o Trace width and spacing requirements based on physical limitations of the board/components (breakout areas) along with the recommended impedance requirements .

Copper weight of signal vs. power/ground layers.

 • Signal Integrity

o Reference planes

 o Dielectric constant

o Loss tangent

 o Fiber weave

 Electrical impact 

The printed circuit boards can be made of several layers. When a PCB is designed with the aid of an EDA software, often are specified several layers that doesn't necessary correspond to conductive material ( copper ). For example, the silkscreen and soldermask are nonconductive layers. Having conductive and nonconductive layers may lead to confusion, because manufacturers use the term layer when they are referring to the conductive layers only. From now on, we are going to use the term layer without the suffix "CAD" only when referring to conductive layers. If we use the term "CAD Layer" we are referring to all kinds of layer, that is, conductive and nonconductive.

The CAD Layer stackup is the following:

CAD Layer (conductive and nonconductive)	CAD Layer description
1	Top silkscreen/overlay ( nonconductive )
2	Top soldermask ( nonconductive )
3	Top paste mask ( nonconductive )
4	Layer 1 ( conductive )
5	Sustrate ( nonconductive )
6	Layer 2 ( conductive )
...	...
n-1	Sustrate ( nonconductive )
n	Layer n ( conductive )
n+1	Bottom paste mask ( nonconductive )
n+2	Bottom solder mask ( nonconductive )
n+3	Bottom silkscreen/overlay ( nonconductive )

Figure 3 shows 3 different stackups. The orange color highlights the layers in each stackup. The stackup height, or board thickness can vary depending on the application, however the most used is 1.6 [mm] or 62 [mils]. In some countries [thou] is used as a synonym for [mils]. ( 1 [mil] = 0.001 [inch] = 0.0254 [mm] )

 

Fig 3. Example of 3 different PCB stackups: 2 layers (a), 4 layers (b) and 6 layers (c)

In this Article I have tried to give small description about PCB layers stackup. Hope it will be helpful for the readers.Keep reading my article . 

Thanks,

Ruby